C++ coroutine gotcha: Falling off the end of a function-level catch
Allowing execution to flow off the end of a coroutine is equivalent to performing a co_return with no operand, assuming the coroutine completes with no value. Otherwise, the behavior is undefined. This...
View ArticleMicrospeak: The one-pager
At Microsoft, a one-pager is an overview document. It is usually prepared during the early stages of a project or feature in order to share what is known, what is not known, and what the current ideas...
View ArticleMy class derives from std::enable_shared_from_this, but shared_from_this()...
If you make a class T that derives from std::enable_shared_from_this<T>, then the creation of a std::shared_ptr to that class will activate the shared_from_this() method to return a shared_ptr...
View ArticleMaking sure that people use make_unique and make_shared to make your object
Normally, the way you prevent people from constructor your object in an objectionable way is by making the constructor private and offering a factory method. That way, the only way to create the object...
View ArticleUsing C++/WinRT’s final_release to control which thread destructs your object
It is often that case that an object is intended to be used only from a single thread, particularly if it is tied to the user interface somehow, since user interface objects are generally...
View ArticleYes, the 8086 wanted to be mechanically translatable from the 8080, but why...
Some time ago, I noted that the 8086 was designed so that existing 8080 code could be machine-translated instruction by instruction into 8086. The 8086 BX register stood in for the HL register pair on...
View ArticleThe AArch64 processor (aka arm64), part 1: Introduction
The 64-bit version of the ARM architecture is formally known as AArch64. It is the 64-bit version of classic 32-bit ARM, which has been retroactively renamed AArch32. Even though the architecture...
View ArticleThe AArch64 processor (aka arm64), part 2: Extended register operations
There are a number of places where the instruction set permits the value in a register to be transformed before it is used. The set of valid transforms vary from instruction to instruction, but they...
View ArticleThe AArch64 processor (aka arm64), part 3: Addressing modes
Every addressing mode on AArch64 begins with a base register, which can be any numbered register or sp. On top of that, you can add various sprinkles. In the discussion, the term size refers to the...
View ArticleThe AArch64 processor (aka arm64), part 4: Addition and subtraction
Most of the binary operation instructions are of the form op x, y, z x = y op z They take two source operands, combine them according to some operation, and put the result in the destination register....
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